Requisition #: A-176518-26
Status: Full Time
Type: Post Doc
School: Whiting School of Engineering
Department/Program: Commercial and Government Programs Office
Salary: $98,000-$120,000
Location City: Gaithersburg
Location State: MD
Location Zip Code: 20899
Closing Date: Open until filled
To apply: apply.interfolio.com/176518
PREP Research Associate
CHIPS Funded Project.
This position is part of the National Institute of Standards (NIST) Professional Research Experience (PREP) program. NIST recognizes that its research staff may wish to collaborate with researchers at academic institutions on specific projects of mutual interest and thus requires that such institutions be the recipients of a PREP award. The PREP program requires staff from a wide range of backgrounds to work on scientific research in many areas. Employees in this position will perform technical work that underpins the scientific research of the collaboration.
Research Title:
Closing material loops to strengthen US semiconductor supply chains
The work will entail:
NIST's Engineering Lab (EL) Systems Integration Division, Life Cycle Engineering Group is seeking a researcher in operations research and industrial engineering. We are expanding our research to develop ways of maximizing the value of U.S. microelectronics and semiconductors based on principles of circular economy. Microelectronics are valued for their processing capabilities and the materials that they contain. Operations research is applied to enable value recovery from the perspective of measuring the flow of materials, used in semiconductors, throughout the economy. We create methods to measure what, when and how much material will become available in the future and viable pathways for reclaiming those materials into the economy. By applying advanced forecasting methods to establish and validate circular pathways for microelectronic recovery, the project will deliver science-based techniques that strengthen domestic semiconductor manufacturing capabilities. The results will include a suite of decision support tools (metrics, models, and published research) to improve recovery outcomes, thereby strengthening supply chain resiliency via new material sources, and enabling stakeholders to respond dynamically to material availability challenges in the future.
We seek experienced research candidates with a background in micro and nano engineering, operations and/or supply-chain management, and a Ph.D., M.S. and/or related experience with a record of research in peer-reviewed publications. US citizenship needed.
Key responsibilities will include but are not limited to:
- Conduct a literature survey including data collection on state-of-the-art of the microchip manufacturing process and chip product value chain.
- Develop a strong understanding of the microchip market including the strengths and limitations of U.S. chip-making.
- Develop high fidelity simulation models (across multiple product life cycles and product value chains) to quantify and characterize the material stocks and flows, and uncertainties and risks associated with domestic chip manufacturing sector.
- Propose and develop quantitative evaluation metrics to effectively maximize microchip value.
- Regularly synthesize results and analyses of findings and disseminate these via NIST program partners, special reports, high-impact journal publications and as presentations at technical conferences.
Qualifications
Desired skills/technical knowledge include a combination from the following:
- An understanding of micro/nano fabrication processes for chips and first-principle modeling
- Systems thinking, supply chain modeling, and knowledge of integrated production systems
- Data analysis and visualization with Python and/or MATLAB
- Predictive modeling and ML techniques, including dimensionality reduction, regression, and classification (ANOVAs single and multi-factor, non-parametric methods)
- Stochastic Modeling (probabilistic models and their applications to manufacturing systems)
- Principles of integrated production systems, including material handling, material flow and information flow, and scheduling.
Please upload the following with your application:
- CV/Resume
*Please limit C.V to 3 pages only and ONLY include a valid email address for your contact info. Your resume will not be considered if the following information is included on your CV/resume.
- Self portraits
- Phone number
- Home address/Country
- Citizenship status
- Languages spoken
- Sex/Gender
Privacy Act Statement
Authority: 15 U.S.C. § 278g-1(e)(1) and (e)(3) and 15 U.S.C. § 272(b) and (c)
Purpose: The National Institute for Standards and Technology (NIST) hosts the Professional Research Experience Program (PREP) which is designed to provide valuable laboratory experience and financial assistance to undergraduates, post-bachelor's degree holders, graduate students, master's degree holders, postdocs, and faculty.
PREP is a 5-year cooperative agreement between NIST laboratories and participating PREP Universities to establish a collaborative research relationship between NIST and U.S. institutions of higher education in the following disciplines including (but may not be limited to) biochemistry, biological sciences, chemistry, computer science, engineering, electronics, materials science, mathematics, nanoscale science, neutron science, physical science, physics, and statistics. This collection of information is needed to facilitate the administrative functions of the PREP Program.
Routine Uses: NIST will use the information collected to perform the requisite reviews of the applications to determine eligibility, and to meet programmatic requirements. Disclosure of this information is also subject to all the published routine uses as identified in the Privacy Act System of Records Notices: NIST-1: NIST Associates.
Disclosure: Furnishing this information is voluntary. When you submit the form, you are indicating your voluntary consent for NIST to use of the information you submit for the purpose stated. By applying to a CHIPS-funded PREP opportunity, you also acknowledge that participation in the project requires signing a Non-Disclosure Agreement (NDA) prior to beginning any work.
To apply for this position, visit: apply.interfolio.com/176518
Salary Range
The referenced salary range represents the minimum and maximum salaries for this position and is based on Johns Hopkins University's good faith belief at the time of posting. Not all candidates will be eligible for the upper end of the salary range. The actual compensation offered to the selected candidate may vary and will ultimately depend on multiple factors, which may include the successful candidate's geographic location, skills, work experience, internal equity, market conditions, education/training and other factors, as reasonably determined by the University.
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